The demand for ever higher circuit board density has resulted in small size semiconductors devices having a low profile. Board space considerations have traditionally been viewed from a two dimensional perspective, and the motivation for thin packaging has been a secondary issue. However, with the electronics industry looking at thin packaging to address density issues associated with products like memory cards, smart cards, emulator cards, package thickness is a critical factor.
Prior art packages include conventional packaging such as National Semiconductor's TapePak.TM., Tape Automated Bonding (TAB), Dual In-line Pin (DIP) packages, and Small Outline Packages (SOPs). TAB packaging uses a liquid plastic to encapsulate the semiconductor chip. Conventional prior art packages use wire bonds to connect the chip to a leadframe. TapePak.TM. has connections along four sides of the package.